Lauren Hirst,North West
When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
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Kennedy's men
"This is essentially a development kit for dexterity. You get this hardware, you explore what can be done in terms of dexterity, then that helps you work out what you want to build if you're going to build a bigger system, or a bigger project, or deploy something," explains Walker.